法国专利FR3068547A1 THYRISTORS REVERSIBLE AC / DC CONVERTER

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专利摘要:
The invention relates to a converter comprising: two transistors (S1, S2) between two terminals (11, 12) of a DC voltage (Vdc); an inductive element (L1) connecting a first midpoint (13) of the series connection of the two transistors to a first terminal (15) of an alternating voltage (Vac); a first thyristor (SCR1) and a second thyristor (SCR2) in series between the DC voltage terminals, a second midpoint (17) of the series connection of the first thyristor and the second thyristor being connected to a second terminal (16 ) the AC voltage, an anode of the first thyristor and a cathode of the second thyristor being connected to said second midpoint; and a third thyristor (SCR3) and a fourth thyristor (SCR4) in series between the DC voltage terminals, a cathode of the third thyristor and an anode of the first thyristor being connected to said second midpoint.
公开号:FR3068547A1
申请号:FR1756180
申请日:2017-06-30
公开日:2019-01-04
发明作者:Ghafour Benabdelaziz；Cedric REYMOND；David Jouve
申请人:STMicroelectronics Tours SAS；
IPC主号:

专利说明:

REVERSIBLE AC / DC CONVERTER TO THYRISTORS
Field
The present application relates generally to electronic circuits and, more particularly, to switching converters known as pole totem output, or mid-point cascode.
Presentation of the prior art
Switching converters are used in many applications and many types of converters are known.
Among the AC-DC converters, there are many architectures with rectifying bridges and other architectures without bridges, based on the switching of two transistors (generally MOS) mounted in cascode at mid point (pole totem).
These converters are generally used for their efficiency in correcting the power factor (Power Factor Corrector - PFC).
summary
There is a need to improve pole totem converters.
One embodiment proposes a reversible pole totem converter architecture.
B15648 - 16-TO-0417
One embodiment offers a solution compatible with a limitation of the inrush current.
Thus, one embodiment provides for a reversible AC-DC converter, comprising:
a first field effect transistor and a second field effect transistor in series between a first terminal and a second terminal for DC voltage;
an inductive element connecting a first midpoint of the association in series of the two transistors to a first terminal intended for an alternating voltage;
a first thyristor and a second thyristor in series between the DC voltage terminals, a second midpoint of the series association of the first thyristor and of the second thyristor being connected to a second terminal intended for alternating voltage, an anode of the first thyristor and a cathode of the second thyristor being connected to said second midpoint; and a third thyristor and a fourth thyristor in series between the DC voltage terminals, a cathode of the third thyristor and an anode of the first thyristor being connected to said second midpoint.
According to one embodiment:
a first diode is in parallel with the first transistor (SI), anode on the first midpoint side; and a second diode is in parallel with the second transistor, cathode on the first midpoint side.
According to one embodiment, each diode is defined by the intrinsic drain-source diode of the transistor concerned.
According to one embodiment, the thyristors are with cathode trigger.
According to one embodiment:
the first thyristor and the fourth thyristor are with cathode trigger; and the second thyristor and the third thyristor are with anode gate.
B15648 - 16-TO-0417
According to one embodiment:
the first thyristor and the fourth thyristor are with anode trigger; and the second thyristor and the third thyristor are cathode trigger.
According to one embodiment, in an alternation! F-continuous conversion mode:
the second thyristor is rendered from way continues for alternations 'a first sign of the AC voltage ; the first thyristor is rendered from way continues for alternations a second sign of the AC voltage ; the second transistor East command of way impulse during the alternations of first sign; and the first transistor is command of way impulse during the alternations of second sign.
According to one embodiment, the first diode serves as a freewheeling diode.
According to one embodiment, in a continuous-alternative conversion mode:
the fourth thyristor is made passing continuously during half-waves of a first sign of the alternating voltage;
the third thyristor is made passing continuously during half-waves of a second sign of the alternating voltage;
the first transistor is impulse-controlled during the alternations of the first sign; and the second transistor is driven impulsively during the alternations of the second sign.
According to one embodiment, the second diode serves as a freewheeling diode.
B15648 - 16-TO-0417
Brief description of the drawings
These characteristics and advantages, as well as others, will be explained in detail in the following description of particular embodiments made without implied limitation in relation to the attached figures, among which:
FIG. 1 is an electrical diagram of a usual example of a totem alternating-DC pole converter;
Figure 2 shows, schematically and partially, partly in the form of blocks, an embodiment of a totem reversible pole converter;
FIGS. 3A, 3B, 3C, 3D, 3E, 3F, 3G and 3H illustrate, in the form of timing diagrams, the operation of the converter of FIG. 2 in continuous AC conversion mode;
FIGS. 4A, 4B, 4C, 4D, 4E, 4F, 4G and 4H illustrate, in the form of timing diagrams, the operation of the converter of FIG. 2 in continuous conversion mode;
5 shows, schematically and simplified, an embodiment of a circuit for generating direct voltages of control circuits of a reversible pole totem converter, adapted to the embodiment of Figure 2;
FIG. 6 shows, schematically and partially in the form of blocks, another embodiment of a totem reversible pole converter;
FIG. 7 represents, schematically and partially in the form of blocks, another embodiment of a totem reversible pole converter;
FIG. 8 shows, schematically and partially in the form of blocks, an embodiment of a circuit for generating direct voltages of control circuits of the converters of FIGS. 6 and 7;
B15648 - 16-TO-0417 Figure 9 shows, schematically and partially in the form of blocks, another embodiment of a totem reversible pole converter; and FIG. 10 represents, schematically and partially in the form of blocks, an embodiment of a circuit for generating direct supply voltages of control circuits of the converter of FIG. 9. Detailed description
The same elements have been designated by the same references in the different figures. In particular, the structural and / or functional elements common to the various embodiments may have the same references and may have identical structural, dimensional and material properties.
For the sake of clarity, only the steps and elements useful for understanding the embodiments which will be described have been shown and will be detailed. In particular, the final application of the converter has not been detailed, the embodiments described being compatible with the usual applications of AC-DC, DC-AC or reversible converters.
Unless otherwise specified, when reference is made to two elements connected to each other, this means directly connected without any intermediate element other than conductors, and when reference is made to two elements connected to each other, it means that these two elements can be directly connected (connected) or linked through one or more other elements.
In the description which follows, the expressions approximately, substantially, and of the order of mean to the nearest 10%, preferably to the nearest 5%.
Figure 1 is an electrical diagram of a common example of pole-to-pole, AC-to-DC converter.
A pole totem converter is based on the use of two MOS transistors (here in N channel) SI and S2, connected in
B15648 - 16-TO-0417 series between two terminals 11 and 12 for supplying a DC voltage Vdc. The drain of transistor SI is on terminal 11 and the source of transistor S2 is on terminal 12. A storage element Cl (capacitor or battery for example) of continuous energy connects terminals 11 and 12, terminal 11 being, arbitrarily , the positive terminal of the voltage Vdc. The midpoint 13 between the two transistors SI and S2 is connected, by means of an inductive element L1 in series with a circuit 14 for limiting the inrush current and losses in steady state, to a first terminal 15 d application of an alternating voltage Vac. The circuit 14 is, for example, a resistor R (with positive temperature coefficient PTC or negative NTC) in parallel with a switch K. The resistor R limits the inrush current at start-up and the switch K short-circuits the resistor in steady state to limit resistive losses once the voltage balance is reached. A second terminal 16 for applying the alternating voltage Vac is connected to the midpoint 17 of a series association of two diodes D3 and D4 connected between the terminals 11 and 12. The anodes of the diodes D3 and D4 are respectively on point 17 and terminal 12 side.
In practice, the terminals 15 and 16 correspond to terminals for connection to the electrical distribution network and an input filter 18 (FILTER), or mains filter, is interposed between on the one hand the terminal 15 and the circuit 14 and, on the other hand, terminal 16 and point 17. An element 19 for measuring the alternating current is inserted between the filter 18 and point 17. The information representative of the current, measured by element 19, is used by a control circuit 20 (CTRL) for the conduction periods of the transistors SI and S2. The circuit 20 receives other information such as, for example, information representative of the voltage Vdc, information representative of the energy requirements of the load connected to the terminals 11 and 12, etc. Circuit 20 supplies control signals to circuits (DRIVER) 21 and 22 for generating control signals
B15648 - 16-TO-0417 of the grids of the respective transistors SI and S2. In FIG. 1, the intrinsic source-drain diodes DI and D2 of the transistors SI and S2 have also been shown. The transistors SI and S2 are controlled in pulse width modulation according to the needs of the load connected to terminals 11 and 12. The frequency of the pulses is generally fixed and is clearly higher (ratio of at least 100, for example of a few kHz to a few hundred kHz) at the frequency of the Vac voltage (generally less than 100 Hz, typically 50 Hz or 60 Hz for the electricity distribution network).
The operation of the totem pole converter in FIG. 1 is as follows. To simplify, the presence of the filter 18 is not taken into account, but it is of course crossed by the current from the terminals 15 and 16 and towards these terminals.
During the positive alternations of the voltage Vac, the transistor S2 is controlled by pulse width modulation in order to be periodically closed (passing) and the transistor SI remains permanently open (blocked). Furthermore, the source-drain diode D2 of the transistor S2 is reverse biased while the source-drain diode DI of the transistor SI is directly biased and serves as a freewheeling diode. During the closing pulses of transistor S2, inductance L1 accumulates energy. The current flows from terminal 15 via inductance Ll, transistor S2 and diode D4 to terminal 16. The continuous load connected to terminals 11 and 12 is supplied by the energy stored in the energy storage element Cl (capacitor or battery). At each opening of the transistor S2, the energy stored in the inductance L1 is transferred to the continuous load. The current is then circulated from the inductance Ll, via the diode DI of the transistor SI to the positive terminal 11, then from the negative terminal 12, via the diode D4 to the terminal 16 to loop back to the inductance Ll. In
B15648 - 16-TO-0417 in some cases, the diode DI is a diode in parallel on the transistor SI.
During the negative alternations of the voltage Vac, the transistor SI is controlled by pulse width modulation to be periodically closed (on) and the transistor S2 remains permanently open (blocked). Furthermore, the source-drain diode DI of the transistor SI is reverse biased while the source-drain diode D2 of the transistor S2 is directly biased and serves as a freewheeling diode. During the closing pulses of the transistor SI, the inductance L1 accumulates energy. Current is circulated from terminal 16 via diode D3, transistor SI and inductance L1 to terminal 15. The continuous load connected to terminals 11 and 12 is supplied by the energy stored in the energy storage element Cl. At each opening of the transistor S2, the energy stored in the inductor L1 is transferred to the continuous load. The current is then circulated from the inductor Ll, via terminals 15 then 16, the diode D3, to the positive terminal 11, then from the negative terminal 12, via the diode D2 to the inductor ll.
The inrush current limiting circuit 14 is used before each closing pulse of one of the transistors SI and S2, in particular when one moves away from the voltage zero of the voltage Vac. Indeed, the voltage across the transistor SI or S2 when it is closed is all the more important as one is close to the middle of the corresponding alternation, which, without limitation circuit, would cause a current peak. The opening of the switch K, in an impulse fashion, before each start of the closing pulse of the transistors SI and S2 so that the resistor R limits the charge current of the capacitor Cl, avoids these current peaks, in particular towards the middle of each alternation.
The converter of figure 1 is unidirectional, that is to say that it can work only in converter
B15648 - 16-TO-0417 alternating-continuous (rectifier or rectify mode). In certain applications, it is desired to have a reversible converter, that is to say capable of also functioning as a DC-AC converter. This is used, for example, to re-inject energy into the electrical distribution network or to power a motor from a battery. The converter must then be able to operate as an inverter.
The described embodiments plan to take advantage of the advantages of a pole-totem architecture and of its efficiency to produce a reversible converter.
An example of application of a reversible converter is to allow, with the same converter, both to supply a load from the electrical distribution network and to inject energy on the network when the load does not consume not.
Another example of application of a reversible converter is to allow, with the same converter, both to power a motor (transfer of electrical and mechanical energy) from a battery and to recharge the battery (transfer of mechanical-electrical energy) from the motor rotation.
One could think of using MOS transistors in place of diodes D3 and D4 in order to make the structure bidirectional. However, the need to limit the inrush current makes this solution very restrictive in terms of controlling the MOS transistors and the size and reliability of the circuit for limiting losses in steady state. The circuit 14 for limiting the inrush current is moreover essential.
Figure 2 shows, schematically and partially, partly in the form of blocks, an embodiment of a totem pole reversible converter.
We find a pole totem structure of two field effect transistors SI and S2, for example MOS transistors (here with N channel), connected in series between two
B15648 - 16-TO-0417 terminals 11 and 12 of a DC voltage Vdc. The drain of transistor SI is on terminal 11 and the source of transistor S2 is on terminal 12. A storage element Cl (capacitor or battery for example) of continuous energy connects terminals 11 and 12, terminal 11 being, arbitrarily , the positive terminal of the voltage Vdc.
The midpoint 13 between the two transistors SI and S2 is connected, via an inductive element Ll, to the first terminal 15 of an alternating voltage Vac. According to the embodiments described, provision is made to replace the diodes D3 and D4 of FIG. 1 by four thyristors SCR1, SCR2, SCR3, SCR4. Two thyristors SCR1 and SCR2 are connected in series between terminals 11 and 12, the anodes of thyristors SCR1 and SCR2 being directed towards terminal 12. Two thyristors SCR3 and SCR4 are connected in series between terminals 11 and 12, the anodes of thyristors SCR3 and SCR4 being directed towards terminal 11. The midpoint 17 of the series associations of thyristors SCR1 and SCR2 and of thyristors SCR3 and SCR4 is common and is connected to a second terminal 16 of the alternating voltage Vac. In the example of Figure 2, the thyristors are all cathode trigger.
As will be seen later, thanks to the proposed solution, a circuit for limiting the inrush current (14, FIG. 1) is not necessary.
The terminals 15 and 16 correspond for example to terminals for connection to the electrical distribution network or to the terminals of a motor, etc., and an input filter 18, or mains filter, is preferably inserted between on the one hand terminal 15 and node 13 and, on the other hand, terminal 16 and point 17. An element 19 for measuring alternating current is inserted between filter 18 and point 17. Information representative of the current, measured by element 19 is used by a control circuit 20 (CTRL) for the conduction periods of the transistors SI and S2. The circuit 20 receives other information such as, for example, information
B15648 - 16-TO-0417 representative of the voltage Vdc, information representative, in rectifier mode, of the needs of the continuous load connected to terminals 11 and 12, etc. The circuit 20 supplies control signals to circuits (DRIVER) 21 and 22 for generating control signals from the gates gS1 and gS2 of the respective transistors SI and S2. The circuit 20 also supplies, directly or indirectly, control signals to the gSCR1, gSCR2, gSCR3 and gSCR4 triggers of the thyristors SCR1, SCR2, SCR3 and SCR4. FIG. 2 also shows the intrinsic source-drain diodes DI and D2 of the transistors SI and S2. As a variant, the diodes DI and D2 can be additional components. According to another variant, the transistor S1 or S2 is turned on during the periods when the current must flow in the diode Dl, respectively D2. This makes it possible to reduce the conduction losses compared to a current flow in the intrinsic diode Dl or D2. The transistors SI and S2 are controlled by pulse width modulation. The pulse frequency is generally fixed and is clearly higher (ratio of at least 100, for example from a few kHz to a few hundred kHz) than the frequency of the voltage Vac (generally less than 100 Hz, typically 50 Hz or 60 Hz for the electricity distribution network). The converter does not raise or lower the voltage in one direction or another. We are only concerned here with the alternative-continuous conversion and vice versa. If necessary, other conversion and regulation systems are present upstream or downstream to achieve a decrease or an increase in the values of the voltages Vac and Vdc.
The use of thyristors in both directions of conduction in a totem pole architecture seems at first sight useless because of the presence of the transistors SI and S2. However, as is apparent from the embodiments below, the use of four thyristors in place of two diodes makes it possible not only to avoid the circuit for limiting the
B15648 - 16-TO-0417 inrush current, but also to make the converter reversible with a particularly simple command.
Figures 3A, 3B, 3C, 3D, 3E, 3F, 3G and 3H illustrate, in the form of timing diagrams, the operation of the converter of Figure 2 in AC / DC conversion mode during a period of the AC voltage Vac.
FIG. 3A shows an example of the shape of the voltage Vac between the terminals 15 and 16 (line or motor voltage). FIG. 3B represents a corresponding example of the shape of the lake current or line or motor current. FIG. 3C represents an example of the corresponding shape of the voltage Vdc between the terminals 11 and 12 (battery or capacitor Cl voltage). FIG. 3D represents a corresponding example of the shape of the current Idc on the DC voltage side. FIG. 3E represents an example of periods of closure of the SCR2 thyristor. FIG. 3F represents an example of the corresponding shape of the gate voltage gS2 of the transistor S2. FIG. 3G represents an example of periods of closure of the SCR1 thyristor. FIG. 3H represents an example of the corresponding shape of the gate voltage gSl of the transistor SI.
We are in steady state, that is to say that we consider that the capacitor C1 is at the charge level required by the application. Start-up operation is similar, but the voltage Vdc gradually increases over several alternations until it reaches its nominal level set by the application. To simplify the explanations, the presence of the filter 18 is neglected in the following.
In AC-DC conversion mode, SCR3 and SCR4 thyristors are not used and remain blocked.
The SCR2 thyristor is turned on during the positive half-waves of the Vac voltage while the SCR1 thyristor is turned on during the negative half-waves of the AC voltage. However, unlike the diodes D3 and D4 of the classic case of FIG. 1, the switching on of the thyristors SCR1 and SCR2 does not depend on the conduction periods
B15648 - 16-TO-0417 of the transistors SI and S2, but is forced during the maximum of the possible duration of the positive and negative alternations. This duration covers at least the entire duration of the train of pulses for controlling the transistors SI and S2, and is fixed by the half-period of the alternating voltage. Thus, the transistor SI or S2 is closed (depending on the alternation of the voltage Vac) while the voltage across its terminals is approximately zero. The control of the transistors SI and S2 is not modified by the embodiments described. Note that the SCR1 or SCR2 thyristor blocks at the end of the half-cycle when the current flowing through it cancels (becomes less than its holding current).
During the positive alternations of the voltage Vac, the transistor S2 is controlled by pulse width modulation in order to be periodically closed (passing) and the transistor SI remains permanently open (blocked). Furthermore, the source-drain diode D2 of the transistor S2 is reverse biased while the source-drain diode DI of the transistor SI is directly biased and serves as a freewheeling diode. During the closing pulses of transistor S2, inductance L1 accumulates energy. The current is circulated from terminal 15, via inductance Ll, transistor S2 and thyristor SCR2 to terminal 16. The continuous load connected to terminals 11 and 12 is supplied by the energy stored in the energy storage element Cl (capacitor or battery). At each opening of the transistor S2, the energy stored in the inductance L1 is transferred to the continuous load. The current is then circulated from the inductance Ll, via the diode DI of the transistor SI to the positive terminal 11, then from the negative terminal 12, via the thyristor SCR2 to the terminal 16 to loop back to 1 inductance Ll.
During the negative alternations of the voltage Vac, the transistor SI is controlled by pulse width modulation to be periodically closed (on) and the
B15648 - 16-TO-0417 transistor S2 remains permanently open (blocked). Furthermore, the source-drain diode Dl of the transistor SI is reverse biased while the source-drain diode D2 of the transistor S2 is directly biased and serves as a freewheeling diode. During the closing pulses of the transistor SI, the inductance L1 accumulates energy. Current is circulated from terminal 16 via thyristor SCR1, transistor SI and inductance L1 to terminal 15. The continuous load connected to terminals 11 and 12 is supplied by the energy stored in the energy storage element Cl. At each opening of the transistor S2, the energy stored in the inductor L1 is transferred to the continuous load. The current is then circulated from the inductance Ll, via terminals 15 then 16, the thyristor SCR1, to the positive terminal 11, then from the negative terminal 12, via the diode D2 to the inductance ll.
The use of four thyristors has another advantage which is to allow operation in an inverter, that is to say in DC-AC conversion.
FIGS. 4A, 4B, 4C, 4D, 4E, 4F, 4G and 4H illustrate, in the form of timing diagrams, the operation of the converter of FIG. 2 in continuous-alternating conversion mode during a period of the alternating voltage Vac.
FIG. 4A represents an example of the shape of the voltage Vac between the terminals 15 and 16 (line or motor voltage). FIG. 4B represents a corresponding example of the shape of the lake current or line or motor current. FIG. 4C shows an example of the corresponding shape of the voltage Vdc between the terminals 11 and 12 (battery or capacitor Cl voltage). FIG. 4D represents a corresponding example of the shape of the current Idc on the DC voltage side. FIG. 4E represents an example of periods of closure of the SCR4 thyristor. FIG. 4F shows an example of the corresponding shape of the gate voltage gS2 of the transistor S2. FIG. 4G represents an example of closed periods of the
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SCR3 thyristor. The figure 4H represented an example of pace correspondent of the voltage of gSl gate of transistor SI.In mode inverter, the question of established regime of the Vdc voltage does himself don't ask. Indeed, it is here of
transfer energy from the continuous source (charged battery for example) to the alternating charge.
To operate as an inverter, that is to say for example reinjecting energy into the electrical distribution network or supplying a motor, the direction of current flow in the converter must be reversed compared to the case of the AC converter. continued. Thus, with the same sign conventions, the current Idc is always negative. Furthermore, the sign of the lac current is reversed with respect to the sign of the voltage Vac, that is to say that it is negative during the positive half-waves and positive during the negative half-waves.
As in the rectifier mode, the SCR4 thyristor is switched on, continuously, during the positive half-waves of the AC alternating voltage while the SCR3 thyristor is switched on, continuously, during the negative half-cycles of the AC alternating voltage Vac. However, on the transistors SI and S2 side, unlike the rectifier mode, the transistor SI is controlled during the positive half-waves and the transistor S2 is controlled during the negative half-waves of the voltage Vac. The transistors SI and S2 are always controlled, on a pulse basis, preferably in pulse width modulation if the alternating load is likely to vary (for example in the case of a motor).
In DC-AC conversion mode, SCR1 and SCR2 thyristors are not used and remain blocked.
During the positive alternations of the voltage Vac, the transistor SI is controlled by pulse width modulation to be periodically closed (on) and the transistor S2 remains permanently open (blocked). Furthermore, the source-drain diode Dl of the transistor SI is polarized at
B15648 - 16-TO-0417 reverses while the source-drain diode D2 of the transistor S2 is directly biased and serves as a freewheeling diode. During the closing pulses of the transistor SI, the inductance L1 accumulates energy. Current is circulated from terminal 11, via transistor SI and inductance L1 to terminal 15, then from terminal 16, via thyristor SCR4 to terminal 12. Each time the transistor SI, the energy stored in the inductor L1 is transferred to the alternating network (or to the motor). The current is then circulated from the inductor L1 to terminal 15, then from terminal 16, via the thyristor SCR4 and the diode D2 to the inductor L1.
During the negative half-waves of the voltage Vac, the transistor S2 is controlled by pulse width modulation in order to be periodically closed (on) and the transistor SI remains permanently open (blocked). Furthermore, the source-drain diode D2 of the transistor S2 is reverse biased while the source-drain diode DI of the transistor SI is directly biased and serves as a freewheeling diode. During the closing pulses of transistor S2, inductance L1 accumulates energy. Current is circulated from terminal 11 via thyristor SCR3 to terminal 16, then from terminal 15 via inductance Ll and transistor S2 to terminal 12. Each time the transistor S2, the energy stored in the inductance L1 is transferred to the AC network. The current is then circulated from the inductor L1, via the diode Dl, the thyristor SCR3 to terminal 16, is looped back through terminal 15 into the inductor L1.
With respect to the rectifier mode, care is taken at each end of alternation to stop the control pulses of the transistors SI and S2 sufficiently early to guarantee that the lac current is zero at the end of the alternation.
The applications more particularly targeted are applications in which the voltages Vac and Vdc have
B15648 - 16-TO-0417 amplitudes greater than 100 volts. However, the control signals of the transistors SI and S2 and of the thyristor SCR1 to SCR4 have amplitudes ranging from a few volts to 10-20 volts. Consequently, it is necessary to provide circuits for generating these control signals having appropriate voltage references.
The following figures show the supply connections and potentials required for the control signals of the transistors and triacs in different embodiments.
FIG. 5 represents, schematically and simplified, an embodiment of a circuit 4 (DC POWER SUPPLY) for generating direct voltages of control circuits of a reversible pole totem converter, adapted to the embodiment of FIG. 2.
In the embodiment of FIG. 2, the circuit 4 must generate four DC voltages VI, V2, V3 and V4 of different amplitude, respectively intended for the thyristor SCR1, for the thyristors SCR2 and SCR3, for the control circuit 21 of the transistor SI, and common to the control circuit of transistor S2, to thyristor SCR4 and to circuit 20 (for example, a microcontroller).
On the transistor S2 side, its source being ground GND (potential of terminal 12), the reference potential of its gate control signal gS2 can also be ground GND. The circuit 22 is supplied by a positive voltage V4, for example of the order of 15 volts, which can be used to generate a voltage of a few volts supplying the circuit 20. Likewise, the injection of a trigger current in thyristor S4, the cathode of which is at GND ground can be made from this voltage of a few volts referenced to GND ground.
On the transistor SI side, the voltage of terminal 11 is too high to authorize a command gS1 referenced to ground GND. Preferably, provision is made to reference a DC supply voltage, for example of a given value chosen between a few volts and about fifteen volts, from circuit 21 to node 13. As node 13 corresponds to the source of the transistor
B15648 - 16-TO-0417
IF, this guarantees a positive gate-source voltage whatever the potential of the node 13 (which changes with the voltage Vac). To this end, a voltage V3 is generated, for example of 15 volts (referenced to GND ground). The application of this voltage to supply the circuit 21 requires a change of voltage reference. An embodiment will be described in relation to FIG. 6.
SCR1 thyristor side, a voltage VI must be generated which also cannot be referenced to GND ground. Preferably, this voltage is generated with a reference to the potential of terminal 11. An example of a circuit for applying voltage VI to the gate of the SCR1 thyristor for injecting a gate current will be deduced below from the description of FIG. 6. An example of a circuit for generating this voltage VI can be deduced from the description of FIG. 8.
SCR2 and SCR3 thyristor side, a trigger current must also be injected with a voltage reference different from GND ground. The voltage V2 is preferably also referenced to the potential of point 17. Here again, an example of a circuit for generating this voltage V2 and its application to the triggers of the thyristors SCR2 and SCR3 will be deduced below from the description of Figure 6.
FIG. 6 schematically and partially in the form of blocks, another embodiment of a reversible pole totem converter.
Compared to the diagram in FIG. 2, the thyristors SCR2 and SCR3 are thyristors with an anode gate. The rest of the assembly is not modified. The consequence is that it is necessary to modify the voltage references of the triggers of the SCR2 and SCR3 thyristors in order to extract a trigger current for initiating them. FIG. 6 also illustrates a circuit for generating the voltage V3 (supply of the circuit 21) from the voltage V4 (15VDC) and illustrates the supply of the circuit 22 by the voltage V4 (15VDC).
B15648 - 16-TO-0417 the reference ground of transistor S2 being
So, as noted, the source
GND (potential of the terminal its GND ground signal.
of the also supplied by referenced to a control voltage of
12), the gate potential gS2 can be Circuit 22 is therefore, for example, positive 15VDC (terminal 51), of 15 volts, ground GND and receives a low voltage digital signal CTRLS2 (of a few volts, for example 3- 5 volts) of circuit 20 (for example, a microcontroller).
On the transistor SI side, the voltage of terminal 11 is too gSl referenced to ground 15 volts are expected, high to allow GND. In the example of supply voltage, node 13. As node 13 commands Figure 6, example corresponds to the gate-source voltage source by
IF, this guarantees a reference to circuit 21 au of the positive transistor regardless of the potential of node 13 (which changes with voltage Vac). A 15VDC potential of 15 volts (referenced to GND ground) is applied (terminal 51) to the anode of a diode D5 whose cathode is connected to a terminal 52 for applying the positive supply potential of circuit 21. A terminal 53 for applying the
13.
reference potential of circuit 21
A capacitor C2 to adapt the supplying the circuit connects the reference cathode of the
21. Due to the is connected to the diode D5 to the low control is applied by which the node terminals node node of 15 volts change of reference voltage CTRLS1, provided via a conduction (the voltage transmitter, a signal by circuit 20, optocoupler 54 (Opto) and the collector of the output bipolar phototransistor) are respectively connected to terminal 52 and to a control input terminal terminal de by being of circuit 21. Signal CTRLS1 is applied on the control of the optocoupler (the anode of its photodiode) referenced to GND ground.
SCR1 and SCR3 thyristor side, the conduction terminals (emitter and optocoupler, phototransistor collector capacitor) (Opto) are connected to
C3 defining a terminal 56 of the transistor an application electrode of one of a
B15648 - 16-TO-0417 positive potential VDC_SCRl / 3 of a continuous supply (for example, of the order of 15 volts) isolated (floating) referenced to a floating mass GND_SCRl / 3, and to the trigger of the thyristor SCR1 for inject a trigger current into it. The floating earth terminal GND_SCRl / 3 of this isolated supply is also connected, by a resistor RI, to the trigger (anode) of the thyristor SCR3, to extract a trigger current. A low voltage control signal CNTRL_SCRl / 3, supplied by the circuit 20, is applied to the control terminal of the optocoupler 55 (the anode of its photodiode) by being referenced to GND ground. When the signal CNTRL_SCRl / 3 is active, the transistor of the optocoupler 55 is on and a current flows from terminal 56, in the trigger of thyristor SCR1 (which starts), towards terminal 11, towards the anode of SCR3 thyristor and is extracted from its trigger (the SCR3 thyristor therefore starts) to return to the floating mass GND_SCRl / 3.
On the SCR2 and SCR4 thyristor side, the conduction terminals (emitter and collector of the phototransistor) of the transistor of an optocoupler 57 (Opto) are connected to the anode trigger of the SCR2 thyristor to draw therein a trigger current and to an electrode of 'a capacitor C4 defining a terminal 58 for applying a floating mass GND_SCR2 / 4 of a continuous supply (for example, of the order of 15 volts) isolated referenced to this floating mass. A positive potential VDC_SCR2 / 4 of this isolated supply is applied, by a resistor R2, to the trigger (of cathode) of the thyristor SCR4 to inject a trigger current there. A low voltage control signal CNTRL_SCR2 / 4, supplied by the circuit 20, is applied to the control terminal of the optocoupler 55 (the anode of its photodiode) by being referenced to GND ground. When the signal CNTRL_SCR2 / 4 is active, the transistor of the optocoupler 55 is conducting and a current flows from the potential VDC_SCR2 / 4, in the trigger of the thyristor SCR4 (which starts), towards the terminal 12, towards the SCR2 thyristor anode and is extracted from its trigger (the SCR2 thyristor therefore initiates) to return to terminal 58.
B15648 - 16-TO-0417
FIG. 7 shows, schematically and partially in the form of blocks, another embodiment of a reversible pole totem converter.
Compared to the diagram in FIG. 2, the thyristors SCR1 and SCR4 are with anode gate and the thyristors SCR2 and SCR3 are with cathode gate. The consequence is on the side of the application voltage references of the thyristor control signals, the rest of the circuit not being modified. Compared to FIG. 6, the control assemblies (optocoupler 55, capacitor C3, resistance RI, application of the relative potentials VDC_SCRl / 3 and GND_SCRl / 3; optocoupler 57, capacitor C4, resistance R2, application of the relative potentials VDC_SCR2 / 4 and GND_SCR2 / 4) are identical. The difference is that, on the thyristor SCR1 and SCR3 side, it is the trigger of the thyristor SCR1 (instead of that of the thyristor SCR3) which is connected to the resistance RI and it is the trigger of the thyristor SCR3 (instead of that of the thyristor SCR1) which is connected to the optocoupler 55. On the thyristor SCR2 and SCR4 side, it is the trigger of the thyristor SCR2 (instead of that of the thyristor SCR4) which is connected to the resistor R2 and it is the trigger of the thyristor SCR4 (instead of terminals 11 and 12 respectively).
FIG. 8 shows, schematically and partially in the form of blocks, an embodiment of a circuit for generating direct voltages of control circuits of the converters of FIGS. 6 and 7.
This figure illustrates an example of assembly of generation of the potentials VDC_SCRl / 3, GND_SCRl / 3, VDC_SCR2 / 4, GND_SCR2 / 4, 15VDC and 3.3VDC (supply of the microcontroller 20) from the alternating voltage Vac.
A transformer 8 is used with three secondary windings 81, 82 and 83. A primary winding 84 of the transformer 8 is connected between terminal 15 by a rectifying diode D8 (for example only positive half-waves are used for the generation of power supplies) and a
B15648 - 16-TO-0417 terminal of a switching converter 85 (CONV), for example an integrated circuit known under the trade name VIPER, the other terminal of which is connected to terminal 16 (Figures 5 to 7).
The first secondary winding 81 of the transformer 8 provides the floating voltage VDC_SCRl / 3-GND_SCRl / 3. For this, a first terminal of the winding 81 defines the potential GND_SCRl / 3 and is connected to the resistor RI. A second terminal of the winding 81 is connected at the input (anode) of a rectifying element D81 (for example, a diode). The output (cathode) of the rectifying element D8 defines the potential VDC_SCRl / 3 and is connected to terminal 56.
The second secondary winding 82 of the transformer 8 provides the floating voltage VDC_SCR2 / 4GND_SCR2 / 4. For this, a first terminal of the winding 82 defines the potential GND_SCR2 / 4 and is connected, in the embodiment of FIGS. 6 and 7, to the terminal 58. A second terminal of the winding 82 is connected to the input ( anode) of a rectifying element D82 (for example, a diode). The output (cathode) of the rectifying element D82 defines the potential VDC_SCR2 / 4 and is connected, via a linear regulator 86 (REG), in the embodiment of FIGS. 6 and 7, to the resistance R2. A capacitor C82 connects the cathode of the diode D83 to the floating ground GND_SCR2 / 4.
The third secondary winding 83 of the transformer 8 supplies the voltage 15VDC-GND. For this, a first terminal of the winding 83 defines the potential GND and is connected to the terminal 12. A second terminal of the winding 83 is connected at the input (anode) of a rectifying element D83 (for example, a diode). The output (cathode) of the rectifying element D83 defines the potential 15VDC and is connected to terminal 51. A capacitor C83 connects the cathode of diode D83 to ground GND.
The amplitudes of the voltages VDC_SCRl / 3-GND_SCRl / 3, VDC_SCR2 / 4-GND_SCR2 / 4 and 15VDC-GND depend on the ratios of
B15648 - 16-TO-0417 transformation of windings 81, 82 and 83 with respect to
Winding 8 4.
In the example shown, the voltage 15VDC is used to generate the low voltage 3.3VDC (for example, 3.3 volts) referenced to ground GND for the circuit or microcontroller 20. For this, we use, for example, a linear regulator 87 (REG). A capacitor C87 connects the output of the converter to terminal 12 (GND ground).
FIG. 9 represents, schematically and partially in the form of blocks, a variant of the embodiment of FIG. 6 in which the control signal CNTRL_SCR2 / 4, reference to the ground GND, is applied to the cathode trigger of the SCR4 thyristor via resistor R4 and to the anode trigger of thyristor SCR2 via circuit 71 of the charge pump (Pump Charge) supplied by the voltage 15VDC. The rest of the assembly is not modified compared to FIG. 6.
FIG. 10 represents, schematically and partially in the form of blocks, an embodiment of a circuit for generating direct supply voltages of control circuits of the converter of FIG. 9.
This figure illustrates an example of the generation of potentials VDC_SCRl / 3, GND_SCRl / 3 and 15VDC from the alternating voltage Vac.
A transformer 9 with two secondary windings 92 and 93 is used. A primary winding 91 of the transformer is connected between terminal 15 and a terminal of a switching converter 95 (CONV), for example an integrated circuit known under the trade name VIPER , the other terminal of which is connected to terminal 16.
A first secondary winding 92 of the transformer 9 supplies the voltage VDC_SCRl / 3-GND_SCRl / 3. For this, a first terminal of the winding 92 defines the potential GND_SCRl / 3 and is connected to the resistor RI (FIG. 9). A second terminal of the winding 92 is connected at the input (anode)
B15648 - 16-TO-0417 of a rectifying element D92 (for example, a diode) and a capacitor C92 connects the two terminals of the winding 92. The output (cathode) of the rectifying element D92 defines the potential VDC_SCRl / 3 and is connected to terminal 56 (Figure 9).
A second secondary winding 93 of the transformer 9 supplies the voltage 15VDC-GND. For this, a first terminal of the winding 93 defines the GND potential and is connected to the terminal 12. A second terminal of the winding 93 is connected at the input (anode) of a rectifying element D93 (for example, a diode). A capacitor C93 connects the two terminals of the winding 93. The output (cathode) of the rectifying element D93 defines the potential 15VDC and is connected to terminal 51.
The amplitudes of the voltages VDC_SCRl / 3-GND_SCRl / 3 and 15VDC-GND depend on the transformation ratios of the windings 92 and 93 relative to the winding 94.
Here also, the voltage 15VDC-GND can be used to generate the low voltage (for example, 3.3 volts) referenced to ground GND for the circuit or microcontroller 20. For this, we use, for example, a linear regulator 97 (REG).
An advantage of the embodiments described is that the totem pole converter thus produced is particularly efficient. In particular, it obviates the need for a circuit for limiting the inrush current, while obtaining a reversible converter.
Particular embodiments have been described. Various variants and modifications will appear to those skilled in the art. In particular, the choice of assembly among those of FIGS. 2, 6, 7 or 9 depends on the application and on the circuit used to generate the control voltages. Indeed, the circuits of Figures 8 and 10 are only examples and we can alternatively use voltages present in the rest of the application. In addition, the practical implementation of the embodiments and the dimensioning of the components is at the
B15648 - 16-TO-0417 scope of the skilled person from the functional given above.

权利要求:
Claims (9)
[1]
1. Reversible AC-DC converter, comprising:
a first field effect transistor (SI) and a second field effect transistor (S2) in series between a first terminal (11) and a second terminal (12) for DC voltage (Vdc);
an inductive element (L1) connecting a first midpoint (13) of the series association of the two transistors to a first terminal (15) intended for an alternating voltage (Vac);
a first thyristor (SCR1) and a second thyristor (SCR2) in series between the DC voltage terminals, a second midpoint (17) of the series association of the first thyristor and of the second thyristor being connected to a second terminal (16 ) intended for alternating voltage, an anode of the first thyristor and a cathode of the second thyristor being connected to said second midpoint; and a third thyristor (SCR3) and a fourth thyristor (SCR4) in series between the DC voltage terminals, a cathode of the third thyristor and an anode of the first thyristor being connected to said second midpoint.
[2]
2. Converter according to claim 1, in which:
a first diode (DI) is parallel with the first transistor (SI) , anode side first mid point (13) r and a second diode (D2) is parallel with the second transistor (S2), cathode side first midpoint
(13).
[3]
3. Converter according to claim 2, wherein each diode (Dl, D2) is defined by the intrinsic drain-source diode of the transistor (SI, S2) concerned.
[4]
4. Converter according to any one of claims 1 to 3, wherein the thyristors (SCR1, SCR2, SCR3, SCR4) are with cathode gate.
B15648 - 16-TO-0417
[5]
5. Converter according to any one of claims 1 to 3, in which:
the first thyristor (SCR1) and the fourth thyristor (SCR4) are with cathode trigger; and the second thyristor (SCR2) and the third thyristor (SCR3) are with anode trigger.
[6]
6. Converter according to any one of claims 1 to 3, in which:
the first thyristor (SCR1) and the fourth thyristor (SCR4) are with anode trigger; and the second thyristor (SCR2) and the third thyristor (SCR3) are with cathode trigger.
[7]
7. Method for controlling a converter according to any one of claims 1 to 6, in which, in an AC-DC conversion mode:
the second thyristor (SCR2) is turned on continuously during alternations of a first sign of the alternating voltage (Vac);
the first thyristor (SCR1) is turned on so
continues for alternations a second sign of the AC voltage ; the second transistor (S2) is ordered from way impulse during the alternations of the first sign; and the first transistor (IF) is ordered from way impulse during the alternations of the second sign. 8. Process according to claim 7, in its
Attachment to claim 2 or 3, wherein the first diode (Dl) serves as a freewheeling diode.
[8]
9. Method for controlling a converter according to any one of claims 1 to 6, in which, in a DC-AC conversion mode:
the fourth thyristor (SCR4) is made passing continuously during alternations of a first sign of the alternating voltage (Vac);
B15648 - 16-TO-0417 the third thyristor (SCR3) is switched on continuously during half-waves of a second sign of the alternating voltage;
the first transistor (SI) is controlled so
5 impulse during the alternations of the first sign; and the second transistor (S2) is pulsed controlled during the alternations of the second sign.
[9]
10. The method of claim 9, in its attachment to claim 2 or 3, wherein the second
10 diode (D2) serves as a freewheeling diode.

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同族专利:

公开号 | 公开日

US20190006959A1|2019-01-03|

EP3422554B1|2020-12-16|

EP3422554A1|2019-01-02|

FR3068547B1|2019-08-16|

CN209170244U|2019-07-26|

US10483874B2|2019-11-19|

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法律状态:
2019-01-04| PLSC| Publication of the preliminary search report|Effective date: 20190104 |

2019-05-22| PLFP| Fee payment|Year of fee payment: 3 |

2020-05-20| PLFP| Fee payment|Year of fee payment: 4 |

优先权:

申请号 | 申请日 | 专利标题

FR1756180A|FR3068547B1|2017-06-30|2017-06-30|THYRISTORS REVERSIBLE AC / DC CONVERTER|

FR1756180|2017-06-30|FR1756180A| FR3068547B1|2017-06-30|2017-06-30|THYRISTORS REVERSIBLE AC / DC CONVERTER|

EP18178859.7A| EP3422554B1|2017-06-30|2018-06-20|Reversible ac/dc converter with thyristors|

CN201820984992.XU| CN209170244U|2017-06-30|2018-06-26|Reversible transducer|

CN201810665680.7A| CN109217707A|2017-06-30|2018-06-26|Reversible AC-DC and DC-AC thyristor converter|

US16/020,431| US10483874B2|2017-06-30|2018-06-27|Reversible AC-DC and DC-AC thyristor converter|

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